//------------------------------------------------------------------------------
// Copyright (c) 2012 by Silicon Laboratories. 
// All rights reserved. This program and the accompanying materials
// are made available under the terms of the Silicon Laboratories End User 
// License Agreement which accompanies this distribution, and is available at
// http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm
// Original content and implementation provided by Silicon Laboratories.
//------------------------------------------------------------------------------

//==============================================================================
// WARNING:
//
// This file is auto-generated by AppBuilder and should not be modified.
// Any hand modifications will be lost if the project is regenerated.
//==============================================================================

#include "gPB.h"

// Include peripheral access modules used in this file
#include <SI32_PBCFG_A_Type.h>
#include <si32_device.h>
#include <SI32_PBSTD_A_Type.h>
#include <SI32_PBCFG_A_Type.h>
#include <SI32_CLKCTRL_A_Type.h>

//==============================================================================
// CONFIGURATION FUNCTIONS
//==============================================================================
void pb_enter_default_mode_from_reset(void)
{
  // PB0 Setup
  SI32_PBSTD_A_set_pins_analog(SI32_PBSTD_0, 0x001E);
  SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_0, 0x001E);

  // PB1 Setup
  SI32_PBSTD_A_set_pins_analog(SI32_PBSTD_1, 0x0180);
  SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_1, 0x0008);
  SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_1, 0x0188);

  // Enable Crossbar0 signals & set properties
  SI32_PBCFG_A_enable_crossbar_0(SI32_PBCFG_0);
  
  // PB2 Setup   
  SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_2, 0x00000C00);

  // Enable Crossbar1 signals & set properties
  SI32_PBCFG_A_enable_crossbar_1(SI32_PBCFG_0);

}
//==============================================================================
void gPB_enter_off_config()
{
   // all ports hi-z
   SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_0, 0x0000FFFF);
   SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_1, 0x0000FFFF);
   SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_2, 0x0000FFFF);
   SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_3, 0x00007FFF);

   SI32_PBCFG_A_disable_crossbar_1(SI32_PBCFG_0);

   SI32_CLKCTRL_A_disable_apb_to_modules_0(SI32_CLKCTRL_0,
      SI32_CLKCTRL_A_APBCLKG0_PB0);
}

//----------------------------------------------------------
// Sets up ports for all peripherals
// NOTE 'default' Refers to the default device setup for the application.
void gPB_enter_default_config()
{
   // START APB CLK AND ENABLE SW PRINF
   SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0, 
                                                   SI32_CLKCTRL_A_APBCLKG0_PB0);
   SI32_PBSTD_A_set_pins_push_pull_output (SI32_PBSTD_1, 0x00000008);

   // ENABLE CROSSBAR 1. WE WILL DRIVE LED's ON CROSSBAR1
   SI32_PBCFG_A_enable_crossbar_1(SI32_PBCFG_0);

   // GPIO PORT SETUP
   // ENABLE LED DRIVERS (P2.11, P2.10)
   SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_2, 0x00000C00);

   // CAPSENSE PORT SETUP
   // CAPSENSE PINS TO ANALOG
   SI32_PBSTD_A_set_pins_analog(SI32_PBSTD_0, 0x0000001E);
   SI32_PBSTD_A_set_pins_analog(SI32_PBSTD_1, 0x00000180);    

}

//---eof------------------------------------------------------------------------
